Western Digital 05 WD76C20 free download

File name 05_WD76C20.pdf

WD76C20lLV TABLE OF CONTENTS Section Title Page 1.0 INTRODUCTION 5-1 1.1 Document Scope 5-1 1.2 Features 5-1 1.3 General Description 5-3 2.0 ARCHITECTURE 5-4 2.1 Bus Interface Logic 5-5 2.2 Chip Select Logic . 5-5 2.3 Floppy Disk Controller 5-5 2.4 Real Time Clock and SRAM 5-5 2.5 Suspend/Resume Logic 5-5 3.0 SIGNAL DESCRIPTION 5-6 4.0 CHIP SELECT LOGIC 5-15 5.0 FLOPPY DISK CONTROLLER 5-18 5.1 765A-Compatible Core 5-18 5.1 .1 Clock and Timing Generator 5-18 5.1.1.1 SCLK 5-18 5.1.1.2 WCLK . . . . 5-19 5.1.1.3 MCLK 5-19 5.1.1.4 Automatic Power Down Mode 5-19 5.2 Drive Interface ... . 5-19 5.2.1 Data Separator . . . 5-20 5.2.2 Write Precompensation 5-20 5.3 Host Interface . . . . . . . 5-20 5.3.1 Control Register 5-21 5.3.2 Disk Interface Control Register 5-22 5.3.3 Operations Register 5-22 5.3.4 Master Status Registers 5-23 5.3.4.1 MSR1: Power Down and PS/2 Support 5-23 5.3.4.2 MSR: FDC Status Information 5-24 5.3.4.3 Overrun Error Status Reporting 5-25 5.3.5 Status Registers 5-26 5.3.5.1 Status Register 0 5-26 5.3.5.2 Status Register 1 5-26 5.3.5.3 Status Register 2